PXS20RM Datasheet, PDF (1036/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

LIN Controller (LINFlexD)
• Slave to Master: transmission of the data field
• Slave to Slave: transmission of the data field
The register settings of the LINCR2, IFER, IFMR, and IFCR registers are shown in Table 31-44.
Table 31-44. Register settings (slave node, TX mode)
LIN frame
LINCR2
IFER
IFMR
IFCR
Slave to Master or DDRQ = 0 To enable an ID filter
Slave to Slave DTRQ = 0 (Tx mode) for each
HTRQ = 0 DMA TX channel
- Identifier list mode
- Identifier mask mode
DFL = payload size
ID = address
CCS = checksum
DIR = 1(TX)
The concept FSM to control the DMA Tx interface is shown in Figure 31-48. DMA TX FSM will move
to idle state if DMATXE[x] = 0, where x = IFMI – 1.
31-60
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor