PXS20RM Datasheet, PDF (813/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
26.6.4 FlexRay Memory Area Layout
The CC supports a wide range of possible layouts for the FlexRay memory area. Two basic layout modes
can be selected by the FIFO address mode bit FR_MCR[FAM].
26.6.4.1 FlexRay Memory Area Layout (FR_MCR[FAM] = 0)
Figure 26-117 shows an example layout for the FIFO address mode FR_MCR[FAM]=0. In this mode, the
following set of rules applies to the layout of the FlexRay memory area:
• The FlexRay memory area is one contiguous region.
• The FlexRay memory area size is maximum 64 Kbytes.
• The FlexRay memory area starts at a 16 byte boundary
The FlexRay memory area contains three areas: the message buffer header area, the message buffer data
area, and the sync frame table area.
System Memory
Sync Frame Table Area
Message Buffer Data Area
Message Buffer Header Fields
Receive FIFO B
Message Buffer Header Fields
Receive FIFO A
Message Buffer Header Fields
Individual Message Buffers
Receive Shadow Buffers
Frame Header
Frame Header
Frame Header
Frame Header
Frame Header
Frame Header
Frame Header
Data Field Offset
Slot Status
Data Field Offset
Data Field Offset
Slot Status
Slot Status
Data Field Offset
Data Field Offset
Slot Status
Slot Status
Data Field Offset
Slot Status
Data Field Offset
Slot Status
FR_SYMBADR[SMBA]
10 bytes
Figure 26-117. Example of FlexRay Memory Area Layout (FR_MCR[FAM] = 0)
26.6.4.2 FlexRay Memory Area Layout (FR_MCR[FAM] = 1)
Figure 26-118 shows an example layout for the FIFO address mode FR_MCR[FAM]=1. The following set
of rules applies to the layout of the FlexRay memory area:
• The FlexRay memory area consists of two contiguous regions.
• The size of each region is maximum 64 Kbytes.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-101