PXS20RM Datasheet, PDF (626/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexCAN Module
ERR_INT — Error Interrupt
This bit indicates that at least one of the Error Bits (bits 16-21) is set. If the corresponding mask bit in
the Control Register (ERR_MSK) is set, an interrupt is generated to the CPU. This bit is cleared by
writing it to ‘1’.Writing ‘0’ has no effect.
1 = Indicates setting of any Error Bit in the Error and Status Register
0 = No such occurrence
WAK_INT — Wake-Up Interrupt
When FlexCAN is in Stop Mode and a recessive to dominant transition is detected on the CAN bus
and if the WAK_MSK bit in the MCR Register is set, an interrupt is generated to the CPU. This bit is
cleared by writing it to ‘1’. Writing ‘0’ has no effect.
1 = Indicates a recessive to dominant transition received on the CAN bus when the FlexCAN
module is in Stop Mode
0 = No such occurrence
24.3.4.9 Interrupt Masks 1 Register (IMASK1)
This register allows to enable or disable any number of a range of 32 Message Buffer Interrupts. It contains
one interrupt mask bit per buffer, enabling the CPU to determine which buffer generates an interrupt after
a successful transmission or reception (i.e., when the corresponding IFLAG1 bit is set).
Base + 0x0028
R
W
RESET:
0
BUF
31M
0
1
BUF
30M
0
2
BUF
29M
0
3
BUF
28M
0
4
BUF
27M
0
5
BUF
26M
0
6
BUF
25M
0
7
BUF
24M
0
8
BUF
23M
0
9
BUF
22M
0
10
BUF
21M
0
11
BUF
20M
0
12
BUF
19M
0
13
BUF
18M
0
14
BUF
17M
0
15
BUF
16M
0
R
W
RESET:
16
BUF
15M
0
17
BUF
14M
0
18
BUF
13M
0
19
BUF
12M
0
20
BUF
11M
0
21
BUF
10M
0
22
BUF
9M
0
23
BUF
8M
0
24
BUF
7M
0
25
BUF
6M
0
26
BUF
5M
0
27
BUF
4M
0
28
BUF
3M
0
29
BUF
2M
0
30
BUF
1M
0
31
BUF
0M
0
Figure 24-11. Interrupt Masks 1 Register (IMASK1)
BUF31M–BUF0M — Buffer MB_i Mask
Each bit enables or disables the respective FlexCAN Message Buffer (MB0 to MB31) Interrupt.
1 = The corresponding buffer Interrupt is enabled
0 = The corresponding buffer Interrupt is disabled
NOTE
Setting or clearing a bit in the IMASK1 Register can assert or negate an
interrupt request, if the corresponding IFLAG1 bit is set.
24-26
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor