PXS20RM Datasheet, PDF (511/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Fault Collection and Control Unit (FCCU)
Table 22-5. FCCU_CFG field descriptions (continued)
Field
Description
FCCU_CFG.FO Fault Output Mode selection
M
000 Dual-Rail (default state; FCCU_F[1:0]= outputs).
001 Time Switching (FCCU_F[1:0]= outputs).
010 Bi-Stable (FCCU_F[1:0]= outputs).
011 Reserved.
100 Reserved.
101 Test0 (FCCU_F[0] = input, FCCU_F[1]= output)
110 Test1 (FCCU_F[0] = output, FCCU_F[1]= output)
111 Test2 (FCCU_F[0] = output, FCCU_F[1]= input)
Note: In Testn mode, a simple double-stage resynchronization stage is used to resynchronize the
FCCU_F input/outputs on the system/IRCOSC clock.
FCCU_CFG.FOP Fault Output Prescaler
FOP defines the prescaler setting used to generate the FCCU_F protocol frequency.
00 0000 Input clock frequency (IRCOSC clock) is divided by 2
00 0001 Input clock frequency (IRCOSC clock) is divided by 4
00 0010 Input clock frequency (IRCOSC clock) is divided by 6
00 0011 Input clock frequency (IRCOSC clock) is divided by 8
00 0100 Input clock frequency (IRCOSC clock) is divided by 10
00 0101 Input clock frequency (IRCOSC clock) is divided by 12
00 0110 Input clock frequency (IRCOSC clock) is divided by 14
The following equation gives the FCCU_F frequency:
F_{FCCU_F} = F_IRCOSC  1024  FOP + 1  2
22.6.4 FCCU CF Configuration Register (FCCU_CF_CFG0..3)
The FCCU_CF_CFGx register is accessible in write mode only in the CONFIG state. It contains the
configuration of each critical fault in terms of fault recovery management.
The configuration depends on the type of signaling following a fault event. Hardware recoverable faults
should be configured only if a previous latching stage captures and hold the physical fault otherwise the
fault can be lost. All the other faults should be configured as SW fault.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
22-11