English
Language : 

PXS20RM Datasheet, PDF (52/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
Introduction
Each FMPLL allows the user to generate high speed system clocks starting from a minimum reference of
4 MHz input clock. Further, the FMPLL supports programmable frequency modulation of the system
clock. The FMPLL multiplication factor, output clock divider ratio are all software configurable. The
FMPLLs have the following major features:
• Input frequency: 4–40 MHz continuous range (limited by the crystal oscillator)
• Voltage controlled oscillator (VCO) range: 256–512 MHz
• Frequency modulation via software control to reduce and control emission peaks
— Modulation depth ±2% if centered or 0% to –4% if downshifted via software control register
— Modulation frequency: triangular modulation with 25 kHz nominal rate
• Option to switch modulation on and off via software interface
• Reduced frequency divider (RFD) for reduced frequency operation without re-lock
• 3 modes of operation
— Bypass mode
— Normal FMPLL mode with crystal reference (default)
— Normal FMPLL mode with external reference
• Lock monitor circuitry with lock status
• Loss-of-lock detection for reference and feedback clocks
• Self-clocked mode (SCM) operation
• On-chip loop filter
• Auxiliary FMPLL
— Used for FlexRay due to precise symbol rate requirement by the protocol
— Used for motor control periphery and connected IP (A/D digital interface CTU) to allow
independent frequencies of operation for PWM and timers and jitter-free control
— Option to enable/disable modulation to avoid protocol violation on jitter and/or potential
unadjusted error in electric motor control loop
— Allows to run motor control periphery at different (precisely lower, equal or higher as required)
frequency than the system to ensure higher resolution
1.4.15 Main Oscillator
The main oscillator provides these features:
• Input frequency range 4–40 MHz
• Crystal input mode
• External reference clock (3.3 V) input mode
• FMPLL reference
1.4.16 Internal Reference Clock (RC) Oscillator
The architecture uses constant current charging of a capacitor. The voltage at the capacitor is compared to
the stable bandgap reference voltage. The RC oscillator is the device safe clock.
1-12
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor