English
Language : 

PXS20RM Datasheet, PDF (417/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
Enhanced Direct Memory Access (eDMA)
Name
ECP
DPA
CHPRI[0:3]
Table 19-25. eDMA Channel n Priority (DCHPRIn) field descriptions
Description
Enable Channel Preemption
Disable Preempt Ability
Channel n Arbitration Priority
Value
0 Channel n cannot be suspended by a higher priority
channel’s service request.
1 Channel n can be temporarily suspended by the
service request of a higher priority channel.
0 Channel n can suspend a lower priority channel.
1 Channel n cannot suspend any channel, regardless
of channel priority.
Channel priority when fixed-priority arbitration is
enabled.
19.2.1.17 Transfer Control Descriptor (TCD)
Each channel requires a 32-byte transfer control descriptor for defining the desired data movement
operation. The TCD structure was previously discussed in detail in Section 19.1.2, Features. The channel
descriptors are stored in the local memory in sequential order: channel 0, channel 1, ... channel [n-1]. The
definitions of the TCD are presented as eight 32-bit values. Table 19-26 is a 32-bit view of the basic TCD
structure.
Table 19-26. TCDn 32-bit memory structure
eDMA Offset
0x1000 + (32 x n) + 0x00
0x1000 + (32 x n) + 0x04
0x1000 + (32 x n) + 0x08
0x1000 + (32 x n) + 0x0c
0x1000 + (32 x n) + 0x10
0x1000 + (32 x n) + 0x14
0x1000 + (32 x n) + 0x18
0x1000 + (32 x n) + 0x1c
TCDn Field
Source Address (saddr)
Transfer Attributes
(smod, ssize, dmod, dsize)
Signed Source Address Offset (soff)
Signed Minor Loop Offset (smloe, dmloe, mloff)
Inner “Minor” Byte
Count (nbytes)
Last Source Address Adjustment (slast)
Destination Address (daddr)
Current “Major” Iteration Count (citer) Signed Destination Address Offset (doff)
Last Destination Address Adjustment/Scatter Gather Address (dlast_sga)
Beginning “Major” Iteration Count (biter)
Channel Control/Status
(bwc, major.linkch, done, active,
major.e_link, e_sg, d_req, int_half, int_maj,
start)
Figure 19-18 and Table 19-27 define word 0 of the TCDn structure, the saddr field.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
19-21