PXS20RM Datasheet, PDF (1345/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

System Status and Configuration Module (SSCM)
In order to unsecure the device, the password needs to be written first the upper word to the PWCMPH
register, then the lower word to the PWCMPL register. The SSCM will then insert a delay, compare the
password and if the password is correct, unlock the device.
48.3.1.6 DPM Boot Register (DPMBOOT)
Address: Base + 0x0018
Access: Read/Write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
P2BOOT
W
RESET: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
P2BOOT
0
DVLE
W
RESET: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Writes have no effect on this bit
Figure 48-8. DPM Boot (DPMBOOT) Register
Table 48-13. DPMBOOT Field Descriptions
Field
Description
P2BOOT Determines the location from which the 2nd processor will boot, once the main processor releases it from reset. This
field is only used if the device is operating in DPM mode.
DVLE Determines whether the 2nd processor will start executing VLE mode (1=VLE mode, 0=BookE mode). This field is
only used if the device is operating in DPM mode.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
48-9