PXS20RM Datasheet, PDF (489/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Error Correction Status Module (ECSM)
Inversions of the address bus must be defined as non-correctable for the inversion to work and to resolve
properly as a non-correctable error. One-bit data inversions of the address bus are ignored.
If an attempt to force a non-correctable inversion (by asserting EEGR[FRCNCI] or EEGR[FRC1NCI])
and EEGR[ERRBIT] equals 64, then no data inversion will be generated.
The only allowable values for the four control bit enables {FR11BI, FRC1BI, FRCNCI, FR1NCI} are
{0,0,0,0}, {1,0,0,0}, {0,1,0,0}, {0,0,1,0} and {0,0,0,1}. All other values result in unpredictable operations.
21.4.2.12 Platform Flash Memory ECC Address Register (PFEAR)
The PFEAR is a 32-bit register for capturing the address of the last, properly-enabled ECC event in the
platform flash memory. Depending on the state of the ECC Configuration Register, an ECC event in the
platform flash memory causes the address, attributes and data associated with the access to be loaded into
the PFEAR, PFEMR, PFEAT, PFEDRL, and PFEDRH registers, and the appropriate flag (F1BC or FNCE)
in the ECC Status Register to be asserted.
This register can only be read from the IPS programming model; any attempted write is ignored. If no flash
memory ECC event is defined to be handled for this module, accesses to this register will terminate with
an error.
See Figure 21-11 and Table 21-13 for the PFEAR definition.
Register address: ECSM Base + 0x0050
0
1
2
3
4
5
R
W
RESET:
-
-
-
-
-
-
6
7
8
9
PFEAR[0:15]
10 11 12 13 14 15
-
-
-
-
-
-
-
-
-
-
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PFEAR[16:31]
W
RESET:
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Field
PFEAR
= Unimplemented
Figure 21-11. Platform Flash Memory ECC Address (PFEAR) Register
Table 21-13. PFEAR field descriptions
Description
Platform Flash Memory ECC Address
This 32-bit register contains the faulting access address of the last, properly-enabled platform flash
memory ECC event.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
21-15