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PXS20RM Datasheet, PDF (782/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
FlexRay Communication Controller
26.5.2.65 Receive FIFO Range Filter Configuration Register (FR_RFRFCFR)
Base + 0x0098
16-bit write access required
Write: WMD, IBD, SEL: Any Time
SID: POC:config
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
IBD
SEL
W WMD
SIDA/SIDB
Rese
t
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-66. Receive FIFO Range Filter Configuration Register (FR_RFRFCFR)
This register provides access to the four internal frame ID range filter boundary registers of the selected
FIFO. For details on frame ID range filter see Section 26.6.9.9, FIFO Filtering.
Table 26-74. FR_RFRFCFR Field Descriptions
Field
WMD
IBD
SEL
SIDA
SIDB
Description
Write Mode — This control bit defines the write mode of this register.
0 Write to all fields in this register on write access.
1 Write to SEL and IBD field only on write access.
Interval Boundary — This control bit selects the interval boundary to be programmed with the SID
value.
0 program lower interval boundary
1 program upper interval boundary
Filter Selector — This control field selects the frame ID range filter to be accessed.
00 select frame ID range filter 0.
01 select frame ID range filter 1.
10 select frame ID range filter 2.
11 select frame ID range filter 3.
Slot ID — Defines the IBD-selected frame ID boundary value for the SEL-selected range filter.
26.5.2.66 Receive FIFO Range Filter Control Register (FR_RFRFCTR)
Base + 0x009A
Write: Anytime
0
R0
W
Reset 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
0
0
0
0
0
F3MD F2MD F1MD F0MD
F3EN F2EN F1EN F0EN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-67. Receive FIFO Range Filter Control Register (FR_RFRFCTR)
This register is used to enable and disable each frame ID range filter and to define whether it is running as
acceptance or rejection filter.
26-70
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor