PXS20RM Datasheet, PDF (102/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Signal Description
Table 3-3. Supply pins (continued)
Supply
Symbol
Description
V_DD 1V2
VDD_LV_COR
Decoupling pins for core logic. Decoupling capacitor must be connected
between these pins and the nearest V_{DD_LV_COR} pin.
V_SS 1V2
VSS_LV_COR
Decoupling pins for core logic. Decoupling capacitor must be connected
between these pins and the nearest V_{DD_LV_COR} pin.
V_DD 1V2
VDD_LV_COR /
Decoupling pins for core logic. Decoupling capacitor must be connected
between these pins and the nearest V_{DD_LV_COR} pin.
V_SS 1V2
VSS_LV_COR /
Decoupling pins for core logic. Decoupling capacitor must be connected
between these pins and the nearest V_{DD_LV_COR} pin.
NOTES:
1 _{VDD_LV balls are tied together on the 257 MAPBGA substrate.}
2 _{VSS_LV balls are tied together on the 257 MAPBGA substrate.}
3 _{VDD_HV balls are tied together on the 257 MAPBGA substrate.}
4 _{VSS_HV balls are tied together on the 257 MAPBGA substrate.}
Pin #
144 257
pkg pkg
131 VDD_LV¹
132 VSS_LV²
135 VDD_LV¹
137 VSS_LV²
3.3 System pins
Table 3-4. System pins
Symbol
MDO0¹
NMI²
XTAL
EXTAL
TMS²
TCK²
JCOMP³
Description
Dedicated pins
Nexus Message Data Output — line
Non Maskable Interrupt
Input for oscillator amplifier circuit and internal clock generator
Oscillator amplifier output
JTAG state machine control
JTAG clock
JTAG compliance select
Pin #
Direction
144 pkg 257 pkg
Output only 9
E1
Input only
1
E4
Input only 29
N1
Output only 30
R1
Input only 87
M16
Input only 88
L15
Input only 123
C10
3-32
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor