SH7261 Datasheet, PDF (948/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 20 IEBus^TM Controller (IEB) [R5S72612] [R5S72613]
Initial
Bit
Bit Name Value R/W Description
0
TXEACK 0
R/(W)* Acknowledge Bit Status
Indicates the data received in the acknowledge bit of
the data field.
• Acknowledge bit other than in the data field
The IEB terminates the transmission and enters the
wait state if a NAK is received. In this case, this bit
is set to 1.
• Acknowledge bit in the data field
The IEB retransmits data up to the maximum
number of bytes defined by the communications
mode until an ACK is received from the receive unit
if a NAK is received from the receive unit during
data field transmission. In this case, when an ACK
is received from the receive unit during
retransmission, this flag is not set and transmission
will be continued. When transmission is terminated
without receiving an ACK, this flag is set to 1.
Note: This flag is invalid in broadcast communications.
[Setting condition]
• When the acknowledge bit of 1 (NAK) is detected
[Clearing condition]
• When 1 is written
Note: * only 1 can be written to clear the flag.
Rev. 2.00 Sep. 07, 2007 Page 916 of 1312
REJ09B0320-0200