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SH7261 Datasheet, PDF (395/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Section 11 Direct Memory Access Controller (DMAC)
11.8 Determining DMA Channel Priority
11.8.1 Channel Priority Order
Channel priority is allocated in descending order from channel 0; that is priority follows the below
relation, where P indicates priority.
Pchannel 0 > Pchannel 1 > Pchannel 3 … Pchannel 6 > P . channel 7 This order is fixed.
11.8.2 Operation during Multiple DMA Requests
The DMAC determines the priority every time single operand transfer is performed.
When a DMA request with a higher priority is generated during transfer for one channel, the
transfer for the higher-priority channel only starts after the end of the current operand transfer.
Figure 11.10 shows overall operation when multiple DMA requests are generated. The thick lines
in the figure indicate the periods over which the DMA request signals are at the low level. Here
channels 0, 2 and 3 are set to a level sense and channel 1 is set to an edge sense.
1. Since the channel 2 request is masked, it is regarded as non-existent. Thus, transfer on channel
3 starts up.
2. Since channel 0 has the highest priority, transfer on this channel starts up.
3. Since channel 2 has the higher priority of the requests at this point, transfer on this channel
restarts.
4. Transfer on channel 3 is restarted as there are no other requests at this point.
5. When the DMA requests are simultaneously generated for channels 0, 1, and 3, transfer on
channel 0 starts up because it has the highest priority.
6. After the transfer on channel 0 is complete, transfer on channel 1 starts up because it has the
second highest priority.
7. A further DMA request (the selected edge) is received on channel 1 while DMA transfer is in
progress. Transfer on channel 1 is thus restarted after completion of the current round of
transfer on channel 1. No masking period applies in the case of edge sensing.
8. On completion of the transfer on channel 1, transfer on channel 3 starts up since there are no
other requests.
9. No transfer starts up immediately after the end of the unit transfer operation on channel, since
channel 3 requests are masked and there are no other requests. Transfer on channel 3 only
restarts after the end of the masking period.
Rev. 2.00 Sep. 07, 2007 Page 363 of 1312
REJ09B0320-0200