SH7261 Datasheet, PDF (1314/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 31 Electrical Characteristics
SDA
t_BUF
V_IH
V_IL
t_STAH
t_SCLH
t_STAS
t_SP t_STOS
SCL
P* S*
t_SCLL
Sr*
t_Sf
t_Sr
t_SCL
t_SDAH
[Legend]
S: Start condition
P: Stop condition
Sr: Start condition for retransmission
P*
t_SDAS
Figure 31.33 I²C Bus Interface 3 Input/Output Timing
31.3.11 SSI Module Timing
Table 31.15 SSI Module Timing
Conditions: PV_CC = V_CCR = PLLV_CC = 3.0 V to 3.6 V, AV_CC = 3.0 V to 3.6 V,
PV_CC − 0.3 V ≤ AV_CC ≤ PV_CC, AV_ref = 3.0 V to AV_CC,
PV_SS = V_SSR = PLLV_SS = AV_SS = 0 V
Item
Output clock cycle
Input clock cycle
Clock high
Clock low
Clock rise time
Delay
Setup time
Hold time
AUDIO_CLK
input frequency
Symbol Min.
t_O
80
t_I
80
t_HC
32
t_LC
32
t
RC

t_DTR

t
15
SR
t
5
HTR
f_AUDIO
1
Typ.









Max. Unit
64000 ns
64000 ns

ns

ns
20 ns
50 ns

ns

ns
40 MHz
Remarks
Output
Input
Bidirectional
Output
(100 pF)
Transmit
Receive
Receive
Figure
Figure 31.34
Figures 31.35
and 31.36
Figures 31.37
and 31.38
Figures 31.37
and 31.38
Figure 31.39
Rev. 2.00 Sep. 07, 2007 Page 1282 of 1312
REJ09B0320-0200