SH7261 Datasheet, PDF (1303/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 31 Electrical Characteristics
T1
(ACT)
T2
T3
T4
T5
T6
T7
(WR)
(WR)
(WR)
(WR) (PRA)
CKIO
A16 to A2
A12*
SDCSn
SDRAS
SDCAS
SDWE
t_AD2
t_AD2
t_AD2
Row
Address
C0 (Column
Address 0)
C1
t_AD2
t_AD2
t_AD2
C2
t_AD2
C3
t_AD2
t_AD2
t_AD2
t_AD2
t_AD2
t_AD2
t_CSD2
t_CSD2
t_CSD2
PRA
command
t_CSD2
t_CSD2
t_RASD
t_RASD
t_RASD
t_RASD
t_RASD
t_CASD
t_CASD
t_CASD
t_WED2
t_WED2
SDCKE
DQMn
t_DQMD
(High)
t_WDD2 t_WDH2
t_WDH2 t_WDD2
t_WDH2
t_DQMD
D31 to D0
t_WDD2
t_WDD2
t_WDD2
Note: * Address pin connected to A10 in SDRAM.
Figure 31.18 Multiple Write Bus Timing for SDRAM Space (Four Data Access, DLC = 2
(Two Cycles), DRCD = 1 (Two Cycles), DPCG = 1 (Two Cycles))
Rev. 2.00 Sep. 07, 2007 Page 1271 of 1312
REJ09B0320-0200