SH7261 Datasheet, PDF (1151/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 Pin Function Controller (PFC)
25.1.11 Port F Control Registers 1 and 2 (PFCR1 and PFCR2)
PFCR1 and PFCR2 are 16-bit readable/writable registers that select the functions of the
multiplexed port F pins.
PFCR1 and PFCR2 are initialized to H'0000 by a power-on reset or by switching to deep standby
mode. These registers are not initialized either by a manual reset or by switching to sleep mode or
software standby mode.
(1) Port F Control Register 2 (PFCR2)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
PF7
MD0
—
— PF6MD[1:0] —
— PF5MD[1:0] —
— PF4MD[1:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R/W R R R/W R/W R R R/W R/W R R R/W R/W
Initial
Bit
Bit Name Value R/W
15 to 13 —
All 0 R
12
PF7MD0 0
R/W
11, 10 —
All 0 R
9, 8
PF6MD[1:0] 00
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
PF7 Mode
This bit controls the function of the PF7/AUDATA3 pin.
0: PF7 I/O (port)
1: AUDATA3 I/O (AUD-II)
Reserved
These bits are always read as 0. The write value
should always be 0.
PF6 Mode
These bits control the function of the PF6/
AUDATA2 pin.
00: PF6 I/O (port)
01: AUDATA2 I/O (AUD-II)
10: Setting prohibited
11: Setting prohibited
Rev. 2.00 Sep. 07, 2007 Page 1119 of 1312
REJ09B0320-0200