SH7261 Datasheet, PDF (1317/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 31 Electrical Characteristics
31.3.13 A/D Trigger Input Timing
Table 31.17 A/D Trigger Input Timing
Conditions: PV_CC = V_CCR = PLLV_CC = 3.0 V to 3.6 V, AV_CC = 3.0 V to 3.6 V,
PV_CC − 0.3 V ≤ AV_CC ≤ PV_CC, AV_ref = 3.0 V to AV_CC,
PV_SS = V_SSR = PLLV_SS = AV_SS = 0 V
Module
Item
Symbol Min.
Max. Unit Figure
A/D converter Trigger input setup t_TRGS
time
(n − 1) × t_cyc + 17 
ns
Figure 31.41
Note: Above is the case in which the clock ratio B:P = n:1 (n = 1, 2, 3, 4, 6, 8, or 12)
CKIO
ADTRG
t_TRGS
Figure 31.41 A/D Converter External Trigger Input Timing
31.3.14 I/O Port Timing
Table 31.18 I/O Port Timing
Conditions: PV_CC = V_CCR = PLLV_CC = 3.0 V to 3.6 V, AV_CC = 3.0 V to 3.6 V,
PV_CC − 0.3 V ≤ AV_CC ≤ PV_CC, AV_ref = 3.0 V to AV_CC,
PV_SS = V_SSR = PLLV_SS = AV_SS = 0 V
Item
Output data delay time
Input data setup time
Input data hold time
Symbol
t_PORTD
t
PORTS
t
PORTH
Min.

100
100
Max. Unit
100
ns


Figure
Figure 31.42
Rev. 2.00 Sep. 07, 2007 Page 1285 of 1312
REJ09B0320-0200