SH7261 Datasheet, PDF (1186/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 28 User Debugging Interface (H-UDI)
28.2 Input/Output Pins
Table 28.1 Pin Configuration
Pin Name
H-UDI serial data
input/output clock pin
Symbol
UDTCK*
I/O
Input
Mode select input pin UDTMS* Input
H-UDI reset input pin UDTRST* Input
H-UDI serial data
input pin
H-UDI serial data
output pin
UDTDI* Input
UDTDO Output
ASE mode select pin ASEMD Input
Note: * The pin with the pull-up function.
Function
Data is serially supplied to the H-UDI from the data
input pin (UDTDI), and output from the data output
pin (UDTDO), in synchronization with this clock. Fix
high when not used.
The state of the TAP control circuit is determined
by changing this signal in synchronization with
UDTCK. For the protocol, see figure 28.2. Fix high
when not used.
Input is accepted asynchronously with respect to
UDTCK, and when low, the H-UDI is reset.
UDTRST must be low for oscillation settling time
when power is turned on. See section 28.4.2,
Reset Types, for more information.
Data transfer to the H-UDI is executed by changing
this signal in synchronization with UDTCK. Fix high
when not used.
Data read from the H-UDI is executed by reading
this pin in synchronization with UDTCK. The initial
value of the data output timing is the UDTCK falling
edge. This can be changed to the UDTCK rising
edge by inputting the UDTDO change timing switch
command to SDIR. See section 28.4.3, UDTDO
Output Timing, for more information.
Fix high.
Rev. 2.00 Sep. 07, 2007 Page 1154 of 1312
REJ09B0320-0200