SH7261 Datasheet, PDF (634/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 13 8-Bit Timers (TMR)
External clocks
TMCI0
TMCI1
Clock select
Internal clocks
Pφ/8
Pφ/64
Pφ/8192
Pφ/2
Pφ/32
Pφ/1024
Counter clock 1
Counter clock 0
TCORA_0
Compare match A1
Compare match A0 _{Comparator A_0}
TCORA_1
Comparator A_1
TMO0
TMO1
TMRI0
TMRI1
A/D
conversion
start request
signal
Control
logic
Overflow 1
Overflow 0
Counter clear 0
Counter clear 1
Compare match B1
Compare match B0
TCNT_0
Comparator B_0
TCNT_1
Comparator B_1
TCORB_0
TCSR_0
TCR_0
TCORB_1
TCSR_1
TCR_1
TCCR_0
TCCR_1
CMIA0
CMIA1
CMIB0
CMIB1
OVI0
OVI1
[Legend]
Interrupt signals
TCORA_0: Time constant register A_0
TCORA_1: Time constant register A_1
TCNT_0: Timer counter_0
TCNT_1: Timer counter_1
TCORB_0: Time constant register B_0
TCORB_1: Time constant register B_1
TCSR_0: Timer control/status register_0
TCSR_1: Timer control/status register_1
TCR_0: Timer control register_0
TCR_1: Timer control register_1
TCCR_0: Timer counter control register_0 TCCR_1: Timer counter control register_1
Figure 13.1 Block Diagram of 8-Bit Timer
Rev. 2.00 Sep. 07, 2007 Page 602 of 1312
REJ09B0320-0200