SH7261 Datasheet, PDF (531/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
with the counter. In this interval, therefore, there are two compare match registers for one-phase
output, with the compare register containing the pre-change data, and the temporary register
containing the new data. In this interval, the three counters—TCNT_3, TCNT_4, and TCNTS—
and two registers—compare register and temporary register—are compared, and PWM output
controlled accordingly.
Transfer from temporary
register to compare register
Tb2
TGRA_3
TCDR
TGRA_4
TGRC_4
Ta
Tb1
TCNTS
TCNT_3
TCNT_4
Transfer from temporary
register to compare register
Ta
Tb2
Ta
TDDR
H'0000
Buffer register
TGRC_4
Temporary register
TEMP2
Compare register
TGRA_4
H'6400
H'6400
H'6400
H'0080
H'0080
H'0080
Output waveform
Output waveform
(Output waveform is active-low)
Figure 12.40 Example of Complementary PWM Mode Operation
Rev. 2.00 Sep. 07, 2007 Page 499 of 1312
REJ09B0320-0200