SH7261 Datasheet, PDF (1177/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 27 Power-Down Modes
27.3.3 Software Standby Mode Application Example
This example describes a transition to software standby mode on the falling edge of the NMI
signal, and cancellation on the rising edge of the NMI signal. The timing is shown in figure 27.1.
When the NMI pin is changed from high to low level while the NMI edge select bit (NMIE) in
ICR is set to 0 (falling edge detection), the NMI interrupt is accepted. When the NMIE bit is set to
1 (rising edge detection) by the NMI exception service routine, the STBY and DEEP bits in
STBCR are set to 1 and 0 respectively, and a SLEEP instruction is executed, software standby
mode is entered. Thereafter, software standby mode is canceled when the NMI pin is changed
from low to high level.
Oscillator
CK
NMI pin
NMIE bit
STBY bit
LSI state
Program
execution
NMI
Exception
exception
handling
service routine
Software
standby mode
Oscillation
settling time
NMI exception
handling
Figure 27.1 NMI Timing in Software Standby Mode (Application Example)
Rev. 2.00 Sep. 07, 2007 Page 1145 of 1312
REJ09B0320-0200