SH7261 Datasheet, PDF (196/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 6 Interrupt Controller (INTC)
6.10 Usage Note
6.10.1 Timing to Clear an Interrupt Source
The interrupt source flags should be cleared in the interrupt handler. After clearing the interrupt
source flag, "time from occurrence of interrupt request until interrupt controller identifies priority,
compares it with mask bits in SR, and sends interrupt request signal to CPU" shown in table 6.5 is
required before the interrupt source sent to the CPU is actually cancelled. To ensure that an
interrupt request that should have been cleared is not inadvertently accepted again, read the
interrupt source flag after it has been cleared, and then execute an RTE instruction.
Rev. 2.00 Sep. 07, 2007 Page 164 of 1312
REJ09B0320-0200