SH7261 Datasheet, PDF (1103/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 Pin Function Controller (PFC)
25.1.1 Port A I/O Registers H and L (PAIORH and PAIORL)
PAIORH and PAIORL are 16-bit readable/writable registers that select the I/O direction for the
port A pins. Bits PA31IOR to PA0IOR correspond to pins PA31 to PA0, respectively. PAIORH
and PAIORL are enabled when the function of the port A pins is set to general-purpose I/O (PA31
to PA0) by PACR, and are disabled in other cases. When a bit in PAIORH and PAIORL is set to
1, the corresponding pin is set to output, and when set to 0, the pin is set to input.
PAIORH and PAIORL are initialized to H'0000 by a power-on reset or by switching to deep
standby mode. These registers are not initialized either by a manual reset or by switching to sleep
mode or software standby mode.
(1) Port A I/O Register H (PAIORH)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PA31 PA30 PA29 PA28 PA27 PA26 PA25 PA24 PA23 PA22 PA21 PA20 PA19 PA18 PA17 PA16
IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
(2) Port A I/O Register L (PAIORL)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PA15 PA14 PA13 PA12 PA11 PA10 PA9 PA8 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Rev. 2.00 Sep. 07, 2007 Page 1071 of 1312
REJ09B0320-0200