SH7261 Datasheet, PDF (1301/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 31 Electrical Characteristics
CKIO
A16 to A2
A12*
SDCSn
SDRAS
SDCAS
SDWE
T1
T2
(ACT command)
T3
T4
(WR command)
t_AD2
t_AD2
Row
Address
t_AD2
t_AD2
Column Address
t_CSD2
t_CSD2
t_CSD2
t_CSD2
T5
T6
(PRA command)
t_AD2
t_AD2
t_AD2
t_AD2
t_AD2
t_AD2
Row
Address
t_AD2
t_AD2
PRA
command
t_CSD2
t_CSD2
t_CSD2
t_CSD2
t_RASD
t_RASD
t_RASD
t_RASD
t_RASD
t_RASD
t_CASD
t_CASD
t_WED2
t_WED2
t_WED2
t_WED2
SDCKE
t_DQMD
(High)
t_DQMD
DQMn
D31 to D0
t_WDD2 t_WDH2
Note: * Address pin connected to A10 in SDRAM.
Figure 31.16 Single Write Bus Timing for SDRAM Space
(DLC = 2 (Two Cycles), DRCD = 1 (Two Cycles), DPCG = 1 (Two Cycles))
Rev. 2.00 Sep. 07, 2007 Page 1269 of 1312
REJ09B0320-0200