SH7261 Datasheet, PDF (1316/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 31 Electrical Characteristics
SSISCKn
SSIWSn,
SSIDATAn
AUDIO_CLK
t_SR
t_HTR
Figure 31.38 SSI Receive Timing (2)
f_AUDIO
Figure 31.39 AUDIO_CLK Input Timing
31.3.12 RCAN-ET Module Timing [R5S72611] [R5S72613]
Table 31.16 RCAN-ET Module Timing
Conditions: PV_CC = V_CCR = PLLV_CC = 3.0 V to 3.6 V, AV_CC = 3.0 V to 3.6 V,
PV_CC − 0.3 V ≤ AV_CC ≤ PV_CC, AV_ref = 3.0 V to AV_CC,
PV_SS = V_SSR = PLLV_SS = AV_SS = 0 V
Item
Transmit data delay time
Receive data setup time
Receive data hold time
Symbol
t_CTXD
t_CRXS
t
CRXH
Min.

100
100
Max.
100


Unit Figure
ns Figure 31.40
CKIO
CRx
(receive data)
CTx
(transmit data)
t_CRXS t_CRXH
t_CTXD
Figure 31.40 RCAN-ET Input/Output Timing
Rev. 2.00 Sep. 07, 2007 Page 1284 of 1312
REJ09B0320-0200