SH7261 Datasheet, PDF (845/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 19 Controller Area Network (RCAN-ET) [R5S72611] [R5S72613]
(3) Mailbox Control
The Mailbox Control handles the following functions:
• For received messages, compare the IDs and generate appropriate RAM addresses/data to store
messages from the CAN Interface into the Mailbox and set/clear appropriate registers
accordingly.
• To transmit messages, RCAN-ET will run the internal arbitration to pick the correct priority
message, and load the message from the Mailbox into the Tx-buffer of the CAN Interface and
set/clear appropriate registers accordingly.
• Arbitrates Mailbox accesses between the CPU and the Mailbox Control.
• Contains registers such as TXPR, TXCR, TXACK, ABACK, RXPR, RFPR, UMSR and
MBIMR.
(4) CAN Interface
This block conforms to the requirements for a CAN Bus Data Link Controller which is specified
in Ref. [3, 5]. It fulfils all the functions of a standard Data Link Controller as specified by the OSI
7 Layer Reference model. This functional entity also provides the registers and the logic which are
specific to a given CAN bus, which includes the Receive Error Counter, Transmit Error Counter,
the Bit Configuration Registers and various useful Test Modes. This block also contains functional
entities to hold the data received and the data to be transmitted for the CAN Data Link Controller.
19.2.3 Input/Output Pins
Table 19.1 shows the pin configuration of the RCAN-ET.
Table 19.1 Pin Configuration
Channel Name
0
Transmit data pin
Receive data pin
1
Transmit data pin
Receive data pin
Abbreviation I/O
CTx0
Output
CRx0
Input
CTx1
Output
CRx1
Input
Function
CAN-bus transmit pin
CAN-bus receive pin
CAN-bus transmit pin
CAN-bus receive pin
Rev. 2.00 Sep. 07, 2007 Page 813 of 1312
REJ09B0320-0200