SH7261 Datasheet, PDF (942/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 20 IEBus^TM Controller (IEB) [R5S72612] [R5S72613]
20.3.15 IEBus General Flag Register (IEFLG)
IEFLG indicates the IEB command execution status, lock status and slave address match, and
broadcast reception detection.
IEFLG is initialized by a power-on reset or in deep standby.
Bit: 7
6
5
4
3
2
1
0
CMX MRQ SRQ SRE LCK — RSS GG
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R R R
Initial
Bit
Bit Name Value R/W Description
7
CMX
0
R
Command Execution Status
Indicates the command execution status.
0: Command execution is completed
1: A command is being executed
[Setting condition]
• When a master communications request or slave
transmit request command is issued while the
MRQ, SRQ, or SRE flag is set
[Clearing condition]
• When a command execution has been completed
6
MRQ
0
R
Master Communications Request
Indicates whether the unit is in the communications
request state as a master unit.
0: The unit is not in the communications request state
as a master unit
1: The unit is in the communications request state as a
master unit
[Setting condition]
• When the CMX flag is cleared to 0 after the master
communications request command is issued
[Clearing condition]
• When the master communications have been
completed
Rev. 2.00 Sep. 07, 2007 Page 910 of 1312
REJ09B0320-0200