SH7261 Datasheet, PDF (155/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 6 Interrupt Controller (INTC)
6.3.1 Interrupt Priority Registers 01, 02, 05 to 16 (IPR01, IPR02, IPR05 to IPR16)
IPR01, IPR02, and IPR05 to IPR16 are 16-bit readable/writable registers in which priority levels
from 0 to 15 are set for IRQ interrupts, PINT interrupts, and on-chip peripheral module interrupts.
Table 6.3 shows the correspondence between the interrupt request sources and the bits in IPR01,
IPR02, and IPR05 to IPR16.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Table 6.3 Interrupt Request Sources and IPR01, IPR02, and IPR05 to IPR16
Register Name
Interrupt priority
register 01
Interrupt priority
register 02
Interrupt priority
register 05
Interrupt priority
register 06
Interrupt priority
register 07
Interrupt priority
register 08
Interrupt priority
register 09
Interrupt priority
register 10
Interrupt priority
register 11
Interrupt priority
register 12
Bits 15 to 12
IRQ0
Bits 11 to 8
IRQ1
Bits 7 to 4
IRQ2
Bits 3 to 0
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
PINT0 to PINT7 Reserved
ADI
Reserved
ROM-DEC
MTU1
(TCI1V, TCI1U)
MTU3 (TGI3V)
RTC
MTU0
MTU0
(TGI0A to TGI0D) (TCI0V, TGI0E,
TGI0F)
MTU2
MTU2
(TGI2A, TGI2B) (TCI2V, TCI2U)
MTU4
MTU4
(TGI4A to TGI4D) (TGI4V)
WDT
IIC0
MTU1
(TGI1A, TGI1B)
MTU3
(TGI3A to TGI3D)
MTU5
(TGI5U, TGI5V,
TGI5W)
Reserved
IIC1
IIC2
DMAC0
DMAC1
DMAC2
DMAC3
SCIF0
SCIF1
SCIF2
SCIF3
SCIF4
SCIF5
Rev. 2.00 Sep. 07, 2007 Page 123 of 1312
REJ09B0320-0200