SH7261 Datasheet, PDF (443/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Table 12.28 TIORU_5, TIORV_5, and TIORW_5 (Channel 5)
Description
Bit 4
IOC4
Bit 3
IOC3
Bit 2
IOC2
Bit 1
IOC1
Bit 0
IOC0
TGRU_5,
TGRV_5, and
TGRW_5
Function
TIC5U, TIC5V, and TIC5W Pin Function
0
0
0
0
0
Compare
Compare match
1
match register _{Setting prohibited}
1
X
Setting prohibited
1
X
X
Setting prohibited
1
X
X
X
Setting prohibited
1
0
0
0
0
Input capture Setting prohibited
1
register
Input capture at rising edge
1
0
Input capture at falling edge
1
Input capture at both edges
1
X
X
Setting prohibited
1
0
0
0
Setting prohibited
1
Measurement of low pulse width of external input signal
Capture at trough
1
0
Measurement of low pulse width of external input signal
Capture at crest
1
Measurement of low pulse width of external input signal
Capture at crest and trough
1
0
0
Setting prohibited
1
Measurement of high pulse width of external input
signal
Capture at trough
1
0
Measurement of high pulse width of external input
signal
Capture at crest
1
Measurement of high pulse width of external input
signal
[Legend]
X:
Don't care
Capture at crest and trough
Rev. 2.00 Sep. 07, 2007 Page 411 of 1312
REJ09B0320-0200