SH7261 Datasheet, PDF (825/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 18 Serial Sound Interface (SSI)
When the SSI module acts as a transmitter, each word written to SSITDR is transmitted to the
serial audio bus in the order they are written. When the SSI module acts as a receiver, each word
received by the serial audio bus is read in the order received from the SSIRDR register.
Figures 18.7 to 18.9 show how 2, 3 and 4 channels are transferred to the serial audio bus. Note that
there are no padding bits in the first example, the second example is left-aligned and the third is
right-aligned. This selection is arbitrary and is just for demonstration purposes only.
SCKP = 0, SWSP = 0, DEL = 1, CHNL = 01, SPDP = don't care, SDTA = don't care
System word length = data word length × 2
SSISCK
SSIWS
SSIDATA
LSB MSB
LSB MSB
LSB MSB
LSB MSB
LSB MSB
LSB MSB
LSB MSB
LSB MSB
LSB MSB
Data
word 1
Data
word 2
Data
Data
word 3 word 4
Data
word 1
Data
word 2
Data
Data
word 3 word 4
System word 1
System word 2
System word 1
System word 2
Figure 18.7 Multichannel Format (2 Channels Without Padding)
SCKP = 0, SWSP = 0, DEL = 1, CHNL = 10, SPDP = 1, SDTA = 0
System word length = data word length × 3
SSISCK
SSIWS
SSIDATA ^MSB
LSB MSB
LSB MSB
LSB
MSB
LSB MSB
LSB MSB
LSB
MSB
Data
word 1
Data
word 2
Data
word 3
Data
word 4
Data
word 5
Data
word 6
System word 1
System word 2
Figure 18.8 Multichannel Format (3 Channels with High Padding)
Rev. 2.00 Sep. 07, 2007 Page 793 of 1312
REJ09B0320-0200