SH7261 Datasheet, PDF (412/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
12.3 Register Descriptions
The MTU2 has the following registers. For details on register addresses and register states during
each process, refer to section 30, List of Registers. To distinguish registers in each channel, an
underscore and the channel number are added as a suffix to the register name; TCR for channel 0
is expressed as TCR_0.
Table 12.3 Register Configuration
Channel Register Name
Initial
Abbreviation R/W value
Address
Access Size
0
Timer control register_0 TCR_0
R/W H'00 H'FFFE4300 8, 16, 32
Timer mode register_0
TMDR_0 R/W H'00 H'FFFE4301 8
Timer I/O control register
H_0
TIORH_0
R/W H'00
H'FFFE4302 8, 16
Timer I/O control register
L_0
TIORL_0
R/W H'00 H'FFFE4303 8
Timer interrupt enable
register_0
TIER_0
R/W H'00 H'FFFE4304 8, 16, 32
Timer status register_0
TSR_0
R/W H'C0 H'FFFE4305 8
Timer counter_0
TCNT_0 R/W H'0000 H'FFFE4306 16
Timer general register A_0 TGRA_0 R/W H'FFFF H'FFFE4308 16, 32
Timer general register B_0 TGRB_0 R/W H'FFFF H'FFFE430A 16
Timer general register C_0 TGRC_0 R/W H'FFFF H'FFFE430C 16, 32
Timer general register D_0 TGRD_0 R/W H'FFFF H'FFFE430E 16
Timer general register E_0 TGRE_0 R/W H'FFFF H'FFFE4320 16, 32
Timer general register F_0 TGRF_0 R/W H'FFFF H'FFFE4322 16
Timer interrupt enable
register 2_0
TIER2_0 R/W H'00 H'FFFE4324 8, 16
Timer status register 2_0 TSR2_0 R/W H'C0 H'FFFE4325 8
Timer buffer operation
transfer mode register_0
TBTM_0
R/W H'00 H'FFFE4326 8
Rev. 2.00 Sep. 07, 2007 Page 380 of 1312
REJ09B0320-0200