SH7261 Datasheet, PDF (1172/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 27 Power-Down Modes
27.2.10 Deep Standby Cancel Source Flag Register (DSFR)
DSFR is a 16-bit readable/writable register composed of two types of bits. One is the flag that
confirms which interrupt canceled deep standby mode. The other is the bit that releases the
retaining state of pins after canceling the deep standby mode. DSFR is initialized to H'0000 by a
power-on reset by the RES pin but retains its previous value through a power-on reset caused by a
WDT overflow, a manual reset, or a period in software standby mode. When deep standby mode is
canceled by interrupts (NMI or IRQ) and a manual reset, this register retains the previous data
although power-on reset exception handling is executed. Only word access is valid.
Since interrupt inputs for the NMI and IRQ pins specified by the interrupt controller (INTC) and
the pin function controller (PFC) are always detected, these interrupts set flags even during normal
operation. Therefore, all flags must be cleared immediately before the transition to deep standby
mode.
If an interrupt occurred immediately before executing the SLEEP instruction after the flag clear,
the system enters deep standby mode with the flag set again. To prevent this, clear the flag in
DSFR even in interrupt exception handling routine.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
IOKEEP 



 MRESF NMIF IRQ7F IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F IRQ1F IRQ0F
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/(W)* R R R R R R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*
Note: * Only 0 can be written after reading 1 to clear the flag.
Even when IRQ is input after a manual reset has been accepted as a source canceling deep standby,
the IRQ flag is not set.
Bit
Bit Name
15
IOKEEP
14 to 10 
Initial
Value
0
All 0
R/W Description
R/(W)* Pin State Retention
Releases the retaining state of pins after canceling
the deep standby mode
0: Pin state not retained
[Clearing condition]
• Writing 0 after reading 1
1: Retains pin state
[Setting condition]
• When transits to deep standby mode
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 2.00 Sep. 07, 2007 Page 1140 of 1312
REJ09B0320-0200