SH7261 Datasheet, PDF (628/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(26) Operation when Error Occurs during Reset-Synchronized PWM Mode Operation, and
Operation is Restarted in Normal Mode
Figure 12.150 shows an explanatory diagram of the case where an error occurs in reset-
synchronized PWM mode and operation is restarted in normal mode after re-setting.
1
2
3
4
5
6
Power-on TOCR TMDR TOER PFC TSTR
MTU2
reset
(RPWM) (1) (MTU2) (1)
module output
7
Match
8
9
10
11
12
13
14
Error PFC TSTR TMDR TIOR PFC TSTR
occurs (PORT) (0) (normal) (1 init (MTU2) (1)
0 out)
TIOC3A
TIOC3B
TIOC3D
Port output
PB16
PB17
High-Z
High-Z
PB19
High-Z
Figure 12.150 Error Occurrence in Reset-Synchronized PWM Mode,
Recovery in Normal Mode
1. After a power-on reset, MTU2 output is low and ports are in the high-impedance state.
2. Select the reset-synchronized PWM output level and cyclic output enabling/disabling with
TOCR.
3. Set reset-synchronized PWM.
4. Enable channel 3 and 4 output with TOER.
5. Set MTU2 output with the PFC.
6. The count operation is started by TSTR.
7. The reset-synchronized PWM waveform is output on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR. (MTU2 output becomes the reset-synchronized
PWM output initial value.)
11. Set normal mode. (MTU2 positive phase output is low, and negative phase output is high.)
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
Rev. 2.00 Sep. 07, 2007 Page 596 of 1312
REJ09B0320-0200