SH7261 Datasheet, PDF (470/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Initial
Bit
Bit Name Value R/W Description
5
SCH2
0
R/(W)* Synchronous Start
Controls synchronous start of TCNT_2 in the MTU2.
0: Does not specify synchronous start for TCNT_2 in
the MTU2
1: Specifies synchronous start for TCNT_2 in the MTU2
[Clearing condition]
• When 1 is set to the CST2 bit of TSTR in MTU2
while SCH2 = 1
4
SCH3
0
R/(W)* Synchronous Start
Controls synchronous start of TCNT_3 in the MTU2.
0: Does not specify synchronous start for TCNT_3 in
the MTU2
1: Specifies synchronous start for TCNT_3 in the MTU2
[Clearing condition]
• When 1 is set to the CST3 bit of TSTR in MTU2
while SCH3 = 1
3
SCH4
0
R/(W)* Synchronous Start
Controls synchronous start of TCNT_4 in the MTU2.
0: Does not specify synchronous start for TCNT_4 in
the MTU2
1: Specifies synchronous start for TCNT_4 in the MTU2
[Clearing condition]
• When 1 is set to the CST4 bit of TSTR in MTU2
while SCH4 = 1
2 to 0 —
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
Note: * Only 1 can be written to set the register.
Rev. 2.00 Sep. 07, 2007 Page 438 of 1312
REJ09B0320-0200