SH7261 Datasheet, PDF (319/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 9 Bus State Controller (BSC)
(c) Example of SDRAM Connection
Figures 9.42 and 9.43 show examples of the connection of SDRAM with this LSI.
This LSI
A16
A15
A14
A13 to A2
A1, A0
SDCKE
SDCLK
SDCS
SDRAS
SDCAS
SDWE
D13 to D16
DQM3
DQM2
D15 to D0
DQM1
DQM0
Not in use
Not in use
64 M SDRAM
(1 M × 16 bits × 4 banks)
A13 (BA1)
A12 (BA0)
A11 to A0
CKE
CLK
CS
RAS
CAS
WE
I/O15 to I/O0
DQMU
DQML
A13 (BA1)
A12 (BA0)
A11 to A0
CKE
CLK
CS
RAS
CAS
WE
I/O15 to I/O0
DQMU
DQML
Figure 9.42 Example of Connecting a 32-Bit Data-Width SDRAM
Rev. 2.00 Sep. 07, 2007 Page 287 of 1312
REJ09B0320-0200