SH7261 Datasheet, PDF (797/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 17 I²C Bus Interface 3 (IIC3)
Slave receive mode
Clear AAS in ICSR
Clear ACKBT in ICIER to 0
Dummy-read ICDRR
Read RDRF in ICSR
No
RDRF = 1 ?
Yes
Yes
Last receive - 1?
No
Read ICDRR
[1] Clear the AAS flag.
[1]
[2] Set acknowledge to the transmit device.
[2]
[3] Dummy-read ICDRR.
[3]
[4] Wait for 1 byte to be received.
[5] Check whether it is the (last receive - 1).
[4]
[6] Read the receive data.
[7] Set acknowledge of the last byte.
[5] _{[8] Read the (last byte - 1) of receive data.}
[6] ^{[9] Wait the last byte to be received.}
[10] Read for the last byte of receive data.
Set ACKBT in ICIER to 1
Read ICDRR
Read RDRF in ICSR
No
RDRF = 1 ?
Yes
Read ICDRR
End
[7] Note: When the size of receive data is only one byte in
reception, steps [2] to [6] are skipped after
[8]
step [1], before jumping to step [7]. The step [8]
is dummy-read in ICDRR.
[9]
[10]
Figure 17.21 Sample Flowchart for Slave Receive Mode
Rev. 2.00 Sep. 07, 2007 Page 765 of 1312
REJ09B0320-0200