English
Language : 

SH7261 Datasheet, PDF (1272/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
◁
Section 30 List of Registers
Register
Power-on
Abbreviation Reset
TCNT_2
Initialized
TGRA_2
Initialized
TGRB_2
Initialized
TCNTU_5
Initialized
TGRU_5
Initialized
TCRU_5
Initialized
TIORU_5
Initialized
TCNTV_5
Initialized
TGRV_5
Initialized
TCRV_5
Initialized
TIORV_5
Initialized
TCNTW_5
Initialized
TGRW_5
Initialized
TCRW_5
Initialized
TIORW_5
Initialized
TSR_5
Initialized
TIER_5
Initialized
TSTR_5
Initialized
TCNTCMPCLR Initialized
T8TCR_0
Initialized
T8TCR_1
Initialized
T8TCSR_0
Initialized
T8TCSR_1
Initialized
T8TCORA_0 Initialized
T8TCORA_1 Initialized
T8TCORB_0 Initialized
T8TCORB_1 Initialized
T8TCNT_0
Initialized
T8TCNT_1
Initialized
T8TCCR_0
Initialized
T8TCCR_1
Initialized
ADDRA
Initialized
ADDRB
Initialized
ADDRC
Initialized
ADDRD
Initialized
ADDRE
Initialized
Manual
Reset
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Software
Standby
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Deep
Standby
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Initialized*1
Module
Standby
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
MTU2
TMR
ADC
Rev. 2.00 Sep. 07, 2007 Page 1240 of 1312
REJ09B0320-0200
 ▷