SH7261 Datasheet, PDF (1091/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 24 I/O Ports
24.6.2 Port F Data Register (PFDR)
PFDR is a 16-bit read-only register that stores the port F data. Bits PF7DR to PF0DR correspond
to pins PF7 to PF0, respectively.
If a pin is set to the general output function, the pin will output the value written to the
corresponding bit in PFDR, and the register value is read from PFDR regardless of the state of the
pin.
If a pin is set to the general input function, the pin state, not the register value, will be returned if
PFDR is read. Also, if a value is written to PFDR, although the value will actually be written, it
will have no influence on the state of the pin. Table 24.11 summarizes the PFDR read/write
operations.
PFDR is initialized to H'0000 by a power-on reset or in deep standby mode. This register is not
initialized either by a manual reset or by switching to sleep mode or software standby mode.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0
DR DR DR DR DR DR DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W
Table 24.11 Port F Data Register (PFDR) Read/Write Operations
PFIOR
0
1
Pin Function
General input
Other than general
input
General output
Other than general
output
Read
Write
Pin state
The value is written to PFDR but there is
no effect on the pin state.
Pin state
The value is written to PFDR but there is
no effect on the pin state.
Value of PFDR The value written is output from the pin.
Value of PFDR The value is written to PFDR but there is
no effect on the pin state.
Rev. 2.00 Sep. 07, 2007 Page 1059 of 1312
REJ09B0320-0200