SH7261 Datasheet, PDF (153/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 6 Interrupt Controller (INTC)
6.2 Input/Output Pins
Table 6.1 shows the pin configuration of the INTC.
Table 6.1 Pin Configuration
Pin Name
Nonmaskable interrupt input
pin
Interrupt request input pins
Symbol
NMI
I/O
Input
IRQ7 to IRQ0
Input
PINT7 to PINT0 Input
Function
Input of nonmaskable interrupt
request signal
Input of maskable interrupt request
signals
6.3 Register Descriptions
The INTC has the following registers. These registers are used to set the interrupt priorities and
control detection of the external interrupt input signal.
Table 6.2 Register Configuration
Register Name
Interrupt control register 0
Interrupt control register 1
Interrupt control register 2
IRQ interrupt request register
PINT interrupt enable register
PINT interrupt request register
Bank control register
Bank number register
Interrupt priority register 01
Interrupt priority register 02
Interrupt priority register 05
Interrupt priority register 06
Interrupt priority register 07
Abbreviation R/W
Initial
Value
ICR0
R/W
*¹
ICR1
R/W H'0000
ICR2
R/W H'0000
IRQRR
R/(W)*² H'0000
PINTER
R/W H'0000
PIRR
R
H'0000
IBCR
R/W H'0000
IBNR
R/W H'0000
IPR01
R/W H'0000
IPR02
R/W H'0000
IPR05
R/W H'0000
IPR06
R/W H'0000
IPR07
R/W H'0000
Address
H'FFFD9400
H'FFFD9402
H'FFFD9404
H'FFFD9406
H'FFFD9408
H'FFFD940A
H'FFFD940C
H'FFFD940E
H'FFFD9418
H'FFFD941A
H'FFFD9420
H'FFFD9800
H'FFFD9802
Access
Size
16, 32
16
16, 32
16
16, 32
16
16, 32
16
16, 32
16
16
16, 32
16
Rev. 2.00 Sep. 07, 2007 Page 121 of 1312
REJ09B0320-0200