SH7261 Datasheet, PDF (1009/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
21.3.35 Post-ECC Correction Subheader: Sub-Mode (Byte 18) Data Register (SHEAD22)
SHEAD22 indicates the sub-mode value in the subheader after ECC correction (byte 18).
Bit: 7
6
5
4
3
2
1
0
SHEAD22[7:0]
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R R R
Bit Bit Name
Initial
Value R/W Description
7 to 0 SHEAD22[7:0] All 0 R
Sub-mode value in the subheader after ECC
correction (byte 18)
21.3.36 Post-ECC Correction Subheader: Data Type (Byte 19) Data Register (SHEAD23)
SHEAD23 indicates the data type value in the subheader after ECC correction (byte 19).
Bit: 7
6
5
4
3
2
1
0
SHEAD23[7:0]
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R R R
Bit Bit Name
Initial
Value R/W Description
7 to 0 SHEAD23[7:0] All 0 R
Data type value in the subheader after ECC correction
(byte 19)
Rev. 2.00 Sep. 07, 2007 Page 977 of 1312
REJ09B0320-0200