SH7261 Datasheet, PDF (449/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
• TIER_5
Bit: 7
6
5
4
3
2
1
0
—
—
—
—
—
TGIE TGIE TGIE
5U 5V 5W
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
7 to 3 —
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
2
TGIE5U
0
R/W TGR Interrupt Enable 5U
Enables or disables interrupt requests (TGIU_5) by
compare match between TCNTU_5 and TGRU_5.
0: Interrupt requests (TGIU_5) disabled
1: Interrupt requests (TGIU_5) enabled
1
TGIE5V
0
R/W TGR Interrupt Enable 5V
Enables or disables interrupt requests (TGIV_5) by
compare match between TCNTV_5 and TGRV_5.
0: Interrupt requests (TGIV_5) disabled
1: Interrupt requests (TGIV_5) enabled
0
TGIE5W 0
R/W TGR Interrupt Enable 5W
Enables or disables interrupt requests (TGIW_5) by
compare match between TCNTW_5 and TGRW_5.
0: Interrupt requests (TGIW_5) disabled
1: Interrupt requests (TGIW_5) enabled
Rev. 2.00 Sep. 07, 2007 Page 417 of 1312
REJ09B0320-0200