SH7261 Datasheet, PDF (581/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(2) TGF Flag Setting Timing in Case of Input Capture
Figures 12.101 and 12.102 show the timing for setting of the TGF flag in TSR on input capture,
and TGI interrupt request signal timing.
Pφ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 12.101 TGI Interrupt Timing (Input Capture) (Channels 0 to 4)
Pφ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 12.102 TGI Interrupt Timing (Input Capture) (Channel 5)
Rev. 2.00 Sep. 07, 2007 Page 549 of 1312
REJ09B0320-0200