SH7261 Datasheet, PDF (1167/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 27 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
2
MSTP52 1
R/W Module Stop 52
When the MSTP52 bit is set to 1, the supply of the
clock to the SSI1 is halted.
0: SSI1 runs.
1: Clock supply to SSI1 halted.
1

1
R
Reserved
This bit is always read as 1. The write value should
always be 0.
0
CKDV3
1
R/W SSI Clock Select
Selects division ratio for oversample clock input to
SSI
0: ×1/4 times
1: × 1 time
Rev. 2.00 Sep. 07, 2007 Page 1135 of 1312
REJ09B0320-0200