SH7261 Datasheet, PDF (1029/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
Intput data
Sector 1
Abnormal sector
Sector 3
Sector 4
Sector 5
Sync code
detection
Maintain
Ignore
Maintain ^{Re-synchronization}
Output data
Sector 1
Abnormal
sector
Abnormal
sector
Sector 4
Figure 21.10 Operation in Automatic Sync Maintenance Mode
(When an Abnormally Long Sector is Encountered)
(2) External Sync Mode
In external sync mode, synchronization is always based on the sync codes in the incoming data.
Even if the next sync code is not detected at the 2352nd byte, decoding does not proceed until the
next sync code is detected.
Accordingly, this mode is effective in that it strictly follows the external synchronization timing.
Note, however, that decoding will not be performed normally when the sync-code pattern is input
with abnormal timing.
Figure 21.11 shows the operation in external sync mode.
Intput data
Sync code
detection
Output data
Sector 1
Abnormal sector
Sector 3
Sector 4
Sector 5
Sector 1
Sector 3
Sector 4
Abnormal
sector
Figure 21.11 Operation in External Sync Mode
Rev. 2.00 Sep. 07, 2007 Page 997 of 1312
REJ09B0320-0200