SH7261 Datasheet, PDF (605/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(3) Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in PWM Mode 2
Figure 12.127 shows an explanatory diagram of the case where an error occurs in normal mode
and operation is restarted in PWM mode 2 after re-setting.
1
2
3
Power-onTMDR TOER
MTU2
reset (normal) (1)
module output
4
5
6
TIOR PFC TSTR
(1 init (MTU2) (1)
0 out)
7
8
9
10
11
12
13
14
Match Error PFC TSTR TMDR TIOR PFC TSTR
occurs (PORT) (0) (PWM2) (1 init (MTU2) (1)
0 out)
TIOC*A
Not initialized (cycle register)
TIOC*B
Port output
PB, PC, PD*¹
High-Z
PB, PC, PD*²
High-Z
Notes: 1. This pin is multiplexed with TIOC*A.
2. This pin is multiplexed with TIOC*B.
Figure 12.127 Error Occurrence in Normal Mode, Recovery in PWM Mode 2
1 to 10 are the same as in figure 12.125.
11. Set PWM mode 2.
12. Initialize the pins with TIOR. (In PWM mode 2, the cycle register pins are not initialized. If
initialization is required, initialize in normal mode, then switch to PWM mode 2.)
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
Note: PWM mode 2 can only be set for channels 0 to 2, and therefore TOER setting is not
necessary.
Rev. 2.00 Sep. 07, 2007 Page 573 of 1312
REJ09B0320-0200