SH7261 Datasheet, PDF (1310/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 31 Electrical Characteristics
31.3.7 8-Bit Timer Timing
Table 31.11 8-Bit Timer Timing
Conditions: PV_CC = V_CCR = PLLV_CC = 3.0 V to 3.6 V, AV_CC = 3.0 V to 3.6 V,
PV_CC − 0.3 V ≤ AV_CC ≤ PV_CC, AV_ref = 3.0 V to AV_CC,
PV_SS = V_SSR = PLLV_SS = AV_SS = 0 V
Item
Symbol Min.
Max. Unit Figure
Timer output delay time
t_TMOD

40 ns Figure 31.27
Timer reset input setup time
t
TMRS
(n
−
1)
×
t
cyc
+
25

ns Figure 31.28
Timer clock input setup time
t
TMCS
(n
−
1)
×
t
cyc
+
25

ns Figure 31.29
Timer clock pulse width Single edge t
1.5
TMCWH

t
pcyc
Both edges t
2.5
TMCWL

t
pcyc
Note: Above is the case in which the clock ratio B:P = n:1 (n = 1, 2, 3, 4, 6, 8, or 12)
t_pcyc indicates peripheral clock (Pφ) cycle.
CKIO
t_TMOD
TMO0, TMO1
Figure 31.27 8-Bit Timer Output Timing
CKIO
t_TMRS
TMRI0, TMRI1
Figure 31.28 8-Bit Timer Reset Input Timing
Rev. 2.00 Sep. 07, 2007 Page 1278 of 1312
REJ09B0320-0200