SH7261 Datasheet, PDF (621/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(19) Operation when Error Occurs during Phase Counting Mode Operation, and Operation
is Restarted in PWM Mode 2
Figure 12.143 shows an explanatory diagram of the case where an error occurs in phase counting
mode and operation is restarted in PWM mode 2 after re-setting.
1
2
Power-on TMDR
reset (PCM)
MTU2
module output
3
4
5
TIOR PFC TSTR
(1 init (MTU2) (1)
0 out)
6
Match
7
8
9
10
11
12
13
Error PFC TSTR TMDR TIOR PFC TSTR
occurs (PORT) (0) (PWM2) (1 init (MTU2) (1)
0 out)
TIOC*A
Not initialized (cycle register)
TIOC*B
Port output
PB, PC, PD*¹
High-Z
PB, PC, PD*²
High-Z
Notes: 1. This pin is multiplexed with TIOC*A.
2. This pin is multiplexed with TIOC*B.
Figure 12.143 Error Occurrence in Phase Counting Mode, Recovery in PWM Mode 2
1 to 9 are the same as in figure 12.141.
10. Set PWM mode 2.
11. Initialize the pins with TIOR. (In PWM mode 2, the cycle register pins are not initialized.)
12. Set MTU2 output with the PFC.
13. Operation is restarted by TSTR.
Rev. 2.00 Sep. 07, 2007 Page 589 of 1312
REJ09B0320-0200