SH7261 Datasheet, PDF (1004/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
21.3.25 Pre-ECC Correction Subheader: File Number (Byte 20) Data Register (SHEAD04)
SHEAD04 indicates the file number value in the subheader before ECC correction (byte 20).
Bit: 7
6
5
4
3
2
1
0
SHEAD04[7:0]
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R R R
Bit Bit Name
Initial
Value R/W Description
7 to 0 SHEAD04[7:0] All 0 R
File number value in the subheader before ECC
correction (byte 20)
For sectors not in Mode 2, this register contains the
byte of data at the corresponding position.
21.3.26 Pre-ECC Correction Subheader: Channel Number (Byte 21) Data Register
(SHEAD05)
SHEAD05 indicates the channel number value in the subheader before ECC correction (byte 21).
Bit: 7
6
5
4
3
2
1
0
SHEAD05[7:0]
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R R R
Bit Bit Name
Initial
Value R/W Description
7 to 0 SHEAD05[7:0] All 0 R
Channel number value in the subheader before ECC
correction (byte 21)
For sectors not in Mode 2, this register contains the
byte of data at the corresponding position.
Rev. 2.00 Sep. 07, 2007 Page 972 of 1312
REJ09B0320-0200