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SH7261 Datasheet, PDF (1290/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Section 31 Electrical Characteristics
31.3 AC Characteristics
Signals input to this LSI are basically handled as signals in synchronization with a clock. The
setup and hold times for input pins must be followed.
Table 31.4 Maximum Operating Frequency
Conditions: PVCC = VCCR = PLLVCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V,
PVCC − 0.3 V ≤ AVCC ≤ PVCC, AVref = 3.0 V to AVCC,
PVSS = VSSR = PLLVSS = AVSS = 0 V
Item
Operating CPU (Iφ)
frequency
Internal bus,
external bus (Bφ)
Peripheral module (Pφ)
Symbol
f
Min.
20
20
5
Typ.



Max.
120
100
60
Unit
MHz
Remarks
Regular
specifications
Wide-range
specifications
40
31.3.1 Clock Timing
Table 31.5 Clock Timing
Conditions: PVCC = VCCR = PLLVCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V,
PVCC − 0.3 V ≤ AVCC ≤ PVCC, AVref = 3.0 V to AVCC,
PVSS = VSSR = PLLVSS = AVSS = 0 V
Item
EXTAL, XTAL crystal oscillator frequency
(clock mode 0)
EXTAL, XTAL crystal oscillator frequency
(clock mode 2)
AUDIO_X1, AUDIO_X2 crystal oscillator
frequency
EXTAL clock input frequency
(clock mode 0)
EXTAL clock input frequency
(clock mode 2)
Symbol Min.

10

10

10
f
10
EX
fEX
10
Max.
15
Unit Figure
MHz
20
MHz
25
MHz
15
MHz Figure 31.1
30
MHz
Rev. 2.00 Sep. 07, 2007 Page 1258 of 1312
REJ09B0320-0200