SH7261 Datasheet, PDF (1072/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 23 D/A Converter (DAC)
Initial
Bit
Bit Name Value R/W Description
5
DAE
0
R/W D/A Enable
Used together with the DAOE0 and DAOE1 bits to control
D/A conversion. Output of conversion results is always
controlled by the DAOE0 and DAOE1 bits. For details,
see table 23.3.
0: D/A conversion for channels 0 and 1 is controlled
independently
1: D/A conversion for channels 0 and 1 is controlled
together
4 to 0 
All 1

Reserved
These bits are always read as 1 and cannot be modified.
Table 23.3 Control of D/A Conversion
Bit 5
DAE
0
1
Bit 7
DAOE1
0
1
0
1
Bit 6
DAOE0
0
1
0
1
0
1
0
1
Description
D/A conversion is disabled.
D/A conversion of channel 0 is enabled and D/A conversion
of channel 1 is disabled.
D/A conversion of channel 1 is enabled and D/A conversion
of channel 0 is disabled.
D/A conversion of channels 0 and 1 is enabled.
D/A conversion is disabled.
D/A conversion of channels 0 and 1 is enabled.
Rev. 2.00 Sep. 07, 2007 Page 1040 of 1312
REJ09B0320-0200