SH7261 Datasheet, PDF (616/1348 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(14) Operation when Error Occurs during PWM Mode 2 Operation, and Operation is
Restarted in PWM Mode 1
Figure 12.138 shows an explanatory diagram of the case where an error occurs in PWM mode 2
and operation is restarted in PWM mode 1 after re-setting.
1
2
3
4
5
Power-onTMDR TIOR PFC TSTR
reset (PWM2) (1 init (MTU2) (1)
MTU2
0 out)
module output
6
Match
7
8
9
10 11 12 13
Error PFC TSTR TMDR TIOR PFC TSTR
occurs (PORT) (0) (PWM1) (1 init (MTU2) (1)
0 out)
TIOC*A
Not initialized (cycle register)
TIOC*B
Not initialized (TIOC*B)
Port output
PB, PC, PD*¹
High-Z
PB, PC, PD*²
High-Z
Notes: 1. This pin is multiplexed with TIOC*A.
2. This pin is multiplexed with TIOC*B.
Figure 12.138 Error Occurrence in PWM Mode 2, Recovery in PWM Mode 1
1 to 9 are the same as in figure 12.137.
10. Set PWM mode 1.
11. Initialize the pins with TIOR. (In PWM mode 1, the TIOC*B side is not initialized.)
12. Set MTU2 output with the PFC.
13. Operation is restarted by TSTR.
Rev. 2.00 Sep. 07, 2007 Page 584 of 1312
REJ09B0320-0200